Summer Intern 2025 Engineering

Cambridge, ENG, GB, United Kingdom

Job Description

Cambridge, UK | Full-time | 10-12 Weeks | 37,000 pro rata



About us




Riverlane's mission is to make quantum computing useful, sooner. From climate change to healthcare, large and reliable quantum computers will help solve some of the world's biggest challenges. Riverlane is building the quantum error correction layer to make this happen sooner. It's a complex problem that requires a range of skills, talent and passion. We're making remarkable progress and growing fast.

About the role



Riverlane's Local Clustering Decoder (LCD) is at the forefront of quantum error correction, capable of decoding surface code quantum memory experiments in under 1 microsecond per round of syndrome extraction - fast enough to keep up with today's fastest superconducting qubits.


Its architecture already supports a wide variety of logical qubit operations that will be essential for the fault-tolerant quantum computers of the near future. As an Engineering Intern, you will be responsible for investigating and implementing architectural optimisations that unlock greater flexibility and performance in the LCD decoder. Your work will help ensure this system meets the demands of next-generation quantum hardware, expected to come online within the next five years.

Requirements



What you will do



Collaborate with experienced hardware and software engineers to explore and evaluate architectural optimisations Enhance the decoder's architecture to improve both flexibility and processing speed Contribute to key design decisions involving space/time trade-offs to balance functionality with performance

What we need



Proficiency in Python Solid understanding of low-level computer architecture Willingness to learn about FPGA development, quantum computing, and quantum error correction

Even better if you have



Familiarity with quantum computing or quantum error correction Understanding of optimisation concepts Exposure to networking principles Experience with RTL (Register Transfer Level) development for FPGA/ASIC

Important notes



We are only able to consider applications from (i) current university students, who already have (ii) eligibility to work in the UK (e.g. UK/Irish nationals OR those who have UK/Irish settled/pre-settled status OR those who are on a valid UK student visa. (iii) For those on a UK student visa, regrettably we can only accept applications from Bachelor's/Master's students (and not PhD students). Regrettably, we are unable to provide letters of sponsorship or letters of support for sponsorship applications for your internship scheme. You must be available full-time for 10 to 12 weeks over the summer Internships are based at our Head Office in Cambridge, UK

Benefits



Stipend




Interns receive a competitive stipend. The stipend is 37,000 pro rata for PhD students. We will also pay for any expenses incurred as part of your role e.g. travel to meetings or conferences etc. Regrettably, we are unable to pay for travel to Cambridge or accommodation in Cambridge.

What can you expect from us




Alongside a competitive salary, you can expect a diverse work environment that brings together experts in many fields (including software and hardware development, quantum information theory, physics and maths) and over 20 different nationalities. We also offer free snacks and refreshments and regular social and cultural events.


If you have any queries, please contact jobs@riverlane.com.


Everyone is welcome at Riverlane. We are an equal opportunities employer and encourage applications from eligible and suitably qualified candidates regardless of age, disability, ethnicity, gender, gender reassignment, religion or belief, sexual orientation, marital or civil partnership status, or pregnancy and maternity/paternity.


Studies have shown that women tend to apply to jobs if they meet all or almost all of the requirements whereas men apply even if they meet only some of the requirements. If that sounds like you then please apply - we are happy to review your application and let you know if we think you might be a good fit.


If you need any adjustments made to the application or selection process so you can do your best, please let us know. We will be happy to help.

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Job Detail

  • Job Id
    JD3425518
  • Industry
    Not mentioned
  • Total Positions
    1
  • Job Type:
    Full Time
  • Salary:
    Not mentioned
  • Employment Status
    Permanent
  • Job Location
    Cambridge, ENG, GB, United Kingdom
  • Education
    Not mentioned